Advanced Junction Formation for Sub-32nm Logic Devices
This paper is meant to be a general overview of recent advances in new processes and process tooling (implant and anneal) for advanced junction formation. Also included are details of impact of novel implant processes, such as cold implant and pre-amorphization (PAI) implants on Nickel Silicide (NiSi) formation. We will also discuss subtle impacts of wafer temperature during ion implantation on channel stress retention and shallow junctions in todays advanced device nodes.
Sadanand V. Deshpande Ahmet Ozcan Donald Wall Eunha Kim Oleg Gluschenkov
IBM Semiconductor Research and Development Center, 2070 Route 52, Hopewell Junction, NY, 12533. USA Advanced Process Development, GLOBALFOUNDARIES, 2070 Route 52, Hopewell Junction, NY, USA
国际会议
2010 International Workshop on Junction Technology(2010国际结技术学术研讨会 IWJT 2010)
上海
英文
1-3
2010-05-10(万方平台首次上网日期,不代表论文的发表时间)