CMOS Technology After Reaching The Scale Limit

摘要：

Progress of CMOS LSI has been accomplished by the downsizing of MOSFETs. However, it has been expected that the downscaling will reach its limits about the gate length of 5 nm around the year of 2020. 2020 is not too far, but there is no sufficiently clear image for the world after CMOS reaches its scaling limit. This paper will discuss the picture of the CMOS technology in the world after the 2020.

作者: Hiroshi Iwai

作者单位: Frontier Research Center, Tokyo Institute of Technology 4259-J2-68 Nagatsuta, Midori-ku, Yokohama, Kanagawa, 226-8502, Japan

会议类型: 国际会议

会议名称: 2008 International Workshop on Junction Technology(第六届结技术国际研讨会)

会议地点: 上海

会议语种:英文

页码: 1-2

在线出版日期: 2008-05-15（万方平台首次上网日期，不代表论文的发表时间）