Plasma Doping on 68nm CMOS Device Source/Drain Formations
The plasma doping technique offers unique advantages over conventional beam line systems, including system simplification, lower cost, higher throughput, and device performance equivalence or improvement. Plasma doping has been first used on 68nm CMOS device source and drain formations. A PMOS device was doped by B2H6 plasma doping and an NMOS device was doped by AsH3 plasma doping. The devices fabricated by plasma doping processes were intensively evaluated in this paper. In addition to higher throughput, CMOS devices, both PMOS and NMOS devices, fabricated by plasma doping processes showed improved electrical performance to those fabricated by conventional beam line ion implantation, including ~10-20 percent lower contact resistances, similar threshold and sub-threshold characteristics, ~10 percent higher drive currents and transconductances, and better device performance curves.
plasma doping plasma immersion ion implantation (PIII) CMOS device performance throughput source and drain formations
Shu Qin Allen McTeer Jeff Hu Jennifer Liu Durga Panda Jigish Trivedi
Micron Technology, Inc.8000 S.Federal Way Boise, ID 83707, USA
国际会议
2008 International Workshop on Junction Technology(第六届结技术国际研讨会)
上海
英文
8-13
2008-05-15(万方平台首次上网日期,不代表论文的发表时间)