Low-Voltage Green Transistor Using Ultra Shallow Junction and Hetero-Tunneling

摘要：

A novel hetero-tunnel transistor (HtFET) with a heterostructure and ultra shallow junction parallel to the dielectric interface is proposed for low-voltage (low-power) electronics. Its potential of scaling Vdd down to 0.2 V is examined with quantum mechanical tunneling theory. Data from high-K metal-gate, Si on Ge hetero-tunnel transistor verifies the HtFET concept.

作者: Anupama Bowonder Pratik Patel Kanghoon Jeon Jungwoo Oh Prashant Majhi Hsing-Huang Tseng Chenming Hu

作者单位: Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA 94 SEMATECH, 2706 Montopolis Drive, Austin, TX 78741

会议类型: 国际会议

会议名称: 2008 International Workshop on Junction Technology(第六届结技术国际研讨会)

会议地点: 上海

会议语种:英文

页码: 93-96

在线出版日期: 2008-05-15（万方平台首次上网日期，不代表论文的发表时间）