Multi-Frequency Modular Testing of SoCs by Dynamically Reconfiguring Multi-Port ATE

摘要：

With the debut of a new class of multi-port ATE (e. g., Agilent 93000 series), there is a pressing need for test planning methods to fully adapting SoC test framework design to the new concurrent test capabilities and fulfil emerging demands of high- speed testing. In this paper, we propose a new test planning strategy that addresses multi-frequency SoC testing by dynamically reconfiguring ATE ports. The system integrators on-the-fly group pins into virtual ports while ATE ports simultaneously drive the testing of a set of cores at multiple independent clock domains. An effective and efficient system optimization technique is developed to manage test resources and improve test efficiency for modern complex SoC designs.

作者: Dan Zhao Ronghua Huang Hideo Fujiwara

作者单位: Center for Advanced Computer Studies University at Louisiana at Lafayette, USA Graduate School of Information Science Nara Institute of Science and Technology, Japan

会议类型: 国际会议

会议名称: The 16th Asian Test Symposium(第十六届亚洲测试学术会议)

会议地点: 北京

会议语种:英文

页码: 107-110

在线出版日期: 2007-10-08（万方平台首次上网日期，不代表论文的发表时间）