Optimum Test Set for Bridging Fault Detection in Reversible Circuits
Testing of bridging faults in a reversible circuit is investigated in this paper. The intra-level single bridging fault model is considered here, i.e. any single pair of lines, both lying at the same level of the circuit, may be assumed to have been logically shorted in order to model a defect. For an (n×n) reversible circuit with d levels realized with simple Toffoli gates, the time complexity of the test generation procedure is O(nd2 log2 n). A test set of cardinality O (d log2n) is found to be sufficient for testing all such detectable faults. A minimal test set can also; be easily derived by using the concept of test equivalence.
Hafizur Rahaman Dipak K. Kole Debesh K. Das Bhargab B. Bhattacharya
IT Dept., Bengal Engg. & Sc. University, Howrah - 711 103, India IT Dept., Bengal Engg. & Sc. University, Howrah-711 103, India Dept. of Computer Science and Engg., Jadavpur University, Kolkata-700032, India ACM Unit, Indian Statistical Institute, Kolkata-700108, India
国际会议
The 16th Asian Test Symposium(第十六届亚洲测试学术会议)
北京
英文
125-128
2007-10-08（万方平台首次上网日期，不代表论文的发表时间）