会议专题

Monitoring Translent Errors in Sequential Circuits

Transient errors have become a major concern due to advances in technology scaling. Existing detection techniques for these errors, such as dual modular redundancy (DMR), have very high area overhead as they typically target all possible faults. In this paper, we analyze the effect of transient faults on sequential circuit behavior. We introduce the notion of transition errors (TEs) to capture the critical errors caused by both transient and permanent faults. We also present an error-monitoring scheme aimed specifically at TEs. Finally we describe experiments using the MCNC synthesis benchmark suite which show that, using the proposed monitoring scheme, all TEs can be detected with about 36% area overhead, which is significantly less than alternative approaches like DMR.

Transient faults single event upsets on-line error detection state transition graph finite state machines

Ramashis Das John P. Hayes

Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI 48109, USA

国际会议

The 16th Asian Test Symposium(第十六届亚洲测试学术会议)

北京

英文

319-322

2007-10-08(万方平台首次上网日期,不代表论文的发表时间)