Frequency Analysis Method for Propagation of Transient Errors in Combinational Logic
The continuous development of VLSI technology is shrinking the minimal sizes to nanometer region, making circuits more susceptible to transient error. In this paper, we present a frequency analysis method to accurately estimate the possible propagation of transient fault-due glitches through a CMOS combinational circuit. We use the frequency feature of signal and frequency response of electrical system to analyze the propagation of transient error. Experiments show that on average, our approach provides approximately 95％ accuracy and several orders of magnitude faster with respect to HSPICE simulation.
Shaohua Lei Yinhe Han Xiaowei Li
Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade
国际会议
The 16th Asian Test Symposium(第十六届亚洲测试学术会议)
北京
英文
323-326
2007-10-08（万方平台首次上网日期，不代表论文的发表时间）