Programmable Scan-Based Logic Built-In Self Test

摘要：

This paper presents a programmable approach for performing scan-based logic Built-In Self Test. This approach combines the techniques of reseeding and weighted random patterns testing. Reseeding is used to encode the bias cube and weighted patterns are used to fine tune the weight set. Experimental results show fault coverage comparable to ATPG can be achieved. Most importantly, the scheme fits well in the system test environment and high fault coverage can be obtained with a small number of reconfigurations on the BIST controller.

作者: Liyang Lai Wu-Tung Cheng Thomas Rinderknecht

作者单位: Mentor Graphics Corporation, 8005 SW Boeckman Road, Wilsonville, OR 97070, USA

会议类型: 国际会议

会议名称: The 16th Asian Test Symposium(第十六届亚洲测试学术会议)

会议地点: 北京

会议语种:英文

页码: 371-377

在线出版日期: 2007-10-08（万方平台首次上网日期，不代表论文的发表时间）