Evaluation of a BIST Technique for CMOS Imagers
This paper evaluates a new Built-In-Self-Test (BIST) technique for CMOS imagers. The test stimuli are based on applying electrical pulses at the pixel photodiode anode in order to carry out a purely electrical test. The aim of this work is to eliminate some, if not all, optical tests of the pixel matrix to reduce time and cost during production testing at a wafer level. The quality of the BIST technique is evaluated by computing test metrics such as fault coverage for catastrophic and single parametric faults, and pixel fault acceptance and fault rejection under process deviations for two different pixel architectures.
L. Lizarraga S. Mir G. Sicard
TIMA Laboratory, Grenoble, FRANCE
国际会议
The 16th Asian Test Symposium(第十六届亚洲测试学术会议)
北京
英文
378-383
2007-10-08（万方平台首次上网日期，不代表论文的发表时间）