A Risk Assessment Method for Void in SnAg Solder Bump Influence on Reliability of Flip Chip Packaging
The demand of solder bump packaging keeps growing in recent years because of its advantage of volume I/O counts,competitive electrical performance and smaller packaging dimension.However,considering reliability risk,void in solder bump is one of critical defects during solder bump and flip chip process.Different criteria for solder void comes from different OSAT(Outsourced Semiconductor Assembly and Test),design house and IDM(Integrate Design Manufacture)based on their own product characters and application condition.There should be a common procedure to apply risk assessment to convince all parts to align the solder void criteria.This study adopted a practical risk assessment procedure on solder bump void.Different sizes of solder bump void are demonstrated and used for reliability test,to assess the risk of potential failure,hence this test procedure can ensure that some certain kinds of bump voids are safe in flip chip process and product application.Also it is helpful to be a reference to align solder bump void criteria.
Solder bump void Defect criteria MSL(Moisture Sensitivity Level) Certification Flip Chip reliability
Jun Chen Anmin Hu Xinjiang Long Ming Li
School of Materials Science and engineering Shanghai Jiao Tong University Shanghai,China General management office Jiangyin Changdian Advanced Packing CO.,LTD Jiangyin,China
国际会议
上海
英文
367-371
2018-08-08（万方平台首次上网日期，不代表论文的发表时间）