Multi-chip Power Distribution Network Modeling and Analysis Based on Multi-Input Impedance
With packaging integration density increasing in recent years,more and more components are integrated and power integrity issues are getting worse.Traditional target impedance method is best workable only for single chip load of the power distribution network(PDN)design,and will no longer be applied to multiple chip PDN design.In view of the disadvantages,the concept of multi-input impedance is introduced in this paper.By using the two forms of this concept,i.e.multi-input superposition impedance and multi-input self-impedance,both the superposition effect between different chips and that between various ports within the same chip can be accurately described.With modeling and simulation in frequency domain,the multi-input impedance concept proves to be capable of more accurately reveal the global and local characteristics of planar PDN.This makes the analysis and design of decoupling PDN more reliable,and also provides theoretical basis for the decoupling design and analysis of multi-chip PDN.
power delivery network (PDN) multiple input impedance power integrity
Jincan ZHANG Min MIAO Bo HAN Xiaole CUI
Information Microsystem Institute Beijing Information Science and Technology University Being,China dept.name of organization China Academy of Telecommunications Technology(CATT)Being,China Peking University Shenzhen Graduate School Shenzhen,China
国际会议
上海
英文
854-859
2018-08-08(万方平台首次上网日期,不代表论文的发表时间)