Investigation on two realizations of miniaturized integrated passive devices in a SiP transceiver front-end
The practical design and trade-off of integrated passive devices(IPD)in a system-in-package(SiP)transmitter/receiver has been presented in this paper.Implementing the IPD dies with wire bonding packages has been widely applied to realize the passive devices in the SiP technology.Alternatively,integrating the in-package passive devices with wafer level package(WLP)is an emerging technique,which utilizes the redistribution layer on a silicon interposer to realize the embedded passive devices.In this work,the realization of an integrated low pass filter with the above-mentioned two solutions has been demonstrated,followed by an overall performance comparison and investigation.Besides,typical chip-scale assembly technologies have been illustrated in this paper.The passive device is respectively implemented in a high resistivity silicon IPD process and silicon-based WLP process,featuring a comparable performance and different core area of 0.5 mm2 and 2.7 mm2,respectively.
integrated passive devices redistribution layer fanout layout parasitics
Yu Ban Jie Liu
Information Science Academy of CETC Beijing,China
国际会议
上海
英文
1479-1482
2018-08-08（万方平台首次上网日期，不代表论文的发表时间）