Discussion on failure mechanism and corresponding evaluation technology for the reliability of ICs applications in board-level assembly

摘要：

　　The stresses,reliability issues and failure mechanisms of IC in post second level assembly state are significant different IC in free standing state.Based on the full step analysis of electronic assembly process,this paper demonstrated the possible stress opportunities and corresponding reliability issues in each assembly step from initial paste deposition to final board level installation.The main stresses and reliability issues in general filed application including storage,transport and using were also summarized.Finally,a series of reliability test methods were put forward in detail based on typical failure mechanisms that were analyzed from actual failure cases.

关键词： reliability evaluation IC board-level failure mechanism

作者: Xiao He Jianghua Shen Tao Lu Zeya Peng

作者单位: Reliability Research and Analysis Center(RAC)China Electronic Product Reliability and Environmental Testing Research Institute(CEPREI)Guangzhou 510610,China

会议类型: 国际会议

会议名称: 第十九届国际电子封装技术会议(ICEPT 2018)

会议地点: 上海

会议语种:英文

页码: 1558-1563

在线出版日期: 2018-08-08（万方平台首次上网日期，不代表论文的发表时间）