A Low Performance-Overhead ORAM Design for Processor System with Un-trusted Off-chip Memory
Information leak is a fundamental concern in most computing systems.One security weak point in the processor-based system is the bus between the processor chip and un-trusted off-chip memory,where data can be snooped by an attacker.For the data confidentiality,encryption is commonly used.However,encryption alone is not secure since the information of the system can still be revealed through the plain memory access trace of the processor.A possible solution to such a problem is obscuring the access trace with an oblivious random-access memory(ORAM)scheme where true memory accesses are covered by random dummy accesses to the memory.But existing ORAM designs involve large number of dummy accesses for each true access,which adds significant performance overhead to the execution.In this paper,we propose a low performance-overhead design,RF-ORAM,in which a true memory access is hidden in the dummy accesses to a small flock of random memory locations.The design has two features: one,the accessed memory data are shuffled not only within the current flock but randomly across multiple flocks,and flocks are not correlated with each other so that the randomness of the access trace can be easily achieved with small flocks,hence the performance overhead can be reduced; two,the operations in the ORAM are allowed to be overlapped,therefore,further performance improvement can be achieved.Our experiment on the Xilinx XC7VX330T FPGA platform shows that for a true memory request,RF-ORAM can reduce the performance overhead by more than 5 times when compared to the state-of-the-art design.
ORAM Low Performance Overhead Untrusted Off-chip Memory Secure Processor Privacy
Sajid Hussain Hui Guo
School of Computer Science and Engineering,The University of New South Wales,Australia
国际会议
西安
英文
120-131
2018-09-21（万方平台首次上网日期，不代表论文的发表时间）