An Active Analog Delay Using Delay Reference Loop

摘要：

　　With the development of high-speed mixed-signal circuits,signal timing for the overall system have a crucial impact.Analog delay circuits are widely used in high-speed circuits.In this paper,a compact gm-c active delay is used,while a delay reference loop is used to adjust the delay time.The design and simulation are implemented by 0.13 um SiGe BiCMOS.The chip occupies 0.40 mm2 die area,consuming a power of 227 mW from 2.5 V power supply.Post simulation results demonstrate that single delay unit delays from 3.60 ps to 4.93 ps with 27%adjustment range in frequency(1-20 GHz).

关键词： active delay delay reference loop 0.13 um SiGe BiCMOS

作者: Li Wenyuan Zhao Xiaoming Chen Yang

作者单位: Institute of RF-&OE-ICs Southeast University,Nanjing 210096,China

会议类型: 国际会议

会议名称: 2017 IEEE 2nd Advanced Information Technology,Electronic and Automation Control Conference(IAEAC 2017)(2017 IEEE 第2届先进信息技术、电子与自动化控制国际会议)

会议地点: 重庆

会议语种:英文

页码: 483-486

在线出版日期: 2017-03-25（万方平台首次上网日期，不代表论文的发表时间）