Design of Parallel AD Acquisition Board Based on FPGA
From the point of view of system development,this paper introduces a FPGA based parallel AD acquisition board and its implementation process.The board uses 24-bit 8 channels of TI to synchronize the sampling chip ADS1278 to synchronize the input signals of the 8 input signals.FPGA uses Alteras EP2AGX45F572,Nios Ⅱ processor running on it as the core of data processing.Communication between CY7C68013 and PC can be done with USB Cypress chip.The full use of the Nios can be customized to make the board with the traditional microcontroller or DSP cant achieve the integration of high,strong flexibility and so on.The driver and PC application program are written in VPP,which can store and display the collected data.
FPGA Nios Ⅱ ADS1278 USB Data acquisition
Wang Weiqing Li Haimeng Ding Mingli Fu Ping
Dept. of Automatic Test & Control, Harbin Institute of Technology, Harbin, China, 150001 Beijing Aerospace Automatic Control Institute,Beijing 100854, China
国际会议
哈尔滨
英文
653-658
2016-07-21（万方平台首次上网日期，不代表论文的发表时间）