A Low-power 14-bit Two-stage Hybrid ADC for Infrared Focal Plane Array Detector
this paper presents a low-power 14-bit hybrid incremental Σ-A/cyclic analog-to-digital converter (ADC) based on pseudo-differential operational amplifier,which is designed for the readout circuit of infrared focal plane array detector.This two-stage hybrid ADC employs an incremental sigma-delta ADC and a cyclic ADC,achieving a good trade-off between accuracy and conversion speed.The two stages share the same analog circuit to reduce area and power consumption.A common-mood feedback module is used to suppress the influence of charge injection,and the effectiveness is demonstrated by detailed theoretical analysis and simulation result.A test chip is fabricated in 0.18 μm CMOS technology.The hybrid ADC in each column is performed in parallel with power consumption of 218.813 μW.The simulation result reveals the effective number of bits (ENOB) is 13.775 bits.
hybrid ADC incremental sigma-delta cyclic low power infrared array detector
Zhuo Zhang Yacong Zhang Miaomiao Fan Meng Zhao Dahe Liu Wengao Lu Zhongjian Chen
Peking University Shenzhen Graduate School,Shenzhen,518055,China;Key Laboratory of Microelectronic D Key Laboratory of Microelectronic Devices and Circuits,Institute of Micro & Nano Electronics,Peking Key Laboratory of Microelectronic Devices and Circuits,Institute of Micro & Nano Electronics,Peking
国际会议
重庆
英文
386-390
2016-03-20（万方平台首次上网日期，不代表论文的发表时间）