Design of high-speed FIR filter with Distributed Parallel Structure
To improve the speed of filtering in 320Mbps digital high-speed demodulation system,a design method of FIR filter with parallel distributed structure is presented.This method consists of two steps,namely FIR filter construction and filter coefficient optimization.In filter construction,the Distributed Arithmetic is applied to compute the parallel 8-channel structure of FIR filter.In addition,this structure is implemented as a target device of Spartan3 in Xilinx ISE 14.7.For further optimize the filters coefficient,fixed-point representation is put forward.To evaluate the performance of our proposed method,a validation experiment is conducted.The experimental result demonstrates that our method increases the filer speed by 80%,compared with the serial structure.
high-speed demodulation parallel structure FTR filter Distributed Arithmetic
Mengxue Lei Zhongsong Ma
School of Chinese Academy of Sciences University Beijing,China
国际会议
重庆
英文
511-514
2016-03-20（万方平台首次上网日期，不代表论文的发表时间）