Leakage Aware Hardware Architecture and stochastic Power Gating for Mobile Devices
In this paper,a Smartphone is developed,with modular hardware in which power to each functional unit is delivered through a memory-mapped active switch matrix the state of which is updated periodically by the system based on the current state and expected next state of the system.The objective is to get a near zero leakage current drawn by the functional units that are not currently being used.This substantially minimizes the power consumed by the units when they are in idle state which contributes to more than 60% of the average power consumed in mobile devices.In addition to this novel approach on the hardware architecture,a stochastic dynamic power control and on-demand power and clock gating is implemented.A number of possible cases are evaluated and,under given states of the system,one of them is taken to be optimal for a specific module of the device using the energy delay product (EDP).The developed prototype is compared with three standard Android Smartphones based on performance and power consumption on similar tests and usage scenarios.On almost all the tests,the prototype is shown to yield the lowest power consumption on equivalent performance levels.
Zero-leakage Architecture Active Switch matrix stochastic power gating Energy Response Time Product
Daniel Dilbie Tessema
School of Electrical and Computer Engineering Addis Ababa Institute of Technology,AAU
国际会议
重庆
英文
701-705
2016-03-20（万方平台首次上网日期，不代表论文的发表时间）