60 GHz On-Chip Loop Antenna Integrated in a 0.18 μm CMOS Technology

摘要：

　　This paper describes the electromagnetic (EM) field analysis of a 60 GHz on-chip loop antenna integrated in a 0.18 μm CMOS Technology.The simulation was compared with the measurement.The reflection coefficient showed good agreement between simulation and measurement by assuming a conductive layer of about 1 μm in the simulation.The radiation efficiency is calculated and it was found that the radiation efficiency can be improved by reducing conductivity of the silicon substrate.The radiation efficiency of 82.6% can be achieved if conductivity is less than 0.1 S/m.

关键词： On-chip loop antenna Millimeter-wave CMOS substrate Conductive layer Electromagnetic simulation

作者: Yuki Yao Takuichi Hirano Kenichi Okada Jiro Hirokawa Makoto Ando

作者单位: Dept.of Electrical and Electronic Eng., Tokyo Institute of Technology S3-19, 2-12-1 O-okayama, Megur Dept.of International Development Eng. Dept.of Physical Electronics

会议类型: 国际会议

会议名称: 2013 International Symposium on Antennas and Propagation(2013天线与传播国际会议)

会议地点: 南京

会议语种:英文

页码: 927-929

在线出版日期: 2013-10-23（万方平台首次上网日期，不代表论文的发表时间）