10 Gigabit Ethernet TCP Frame Data Registration Algorithm Based on FPGA

摘要：

　　Using FPGA to achieve full hardware protocol stack in 10 Gigabit Ethernet(10GigE) has the following advantages,such as low cost,wide range of application,high efficiency,etc.Compared with gigabit Ethernet,10GigE adopts wider data width,which makes hardware face the difficulty of data registration for handling intra-frame data.This paper designed FIFO form circular-queue handling TCP frame data registration algorithm,solved the problem of data registration when FPGA device receives,stores and sends TCP frame data and adopted FPGA to build practical system to realize TCP through hard core coding.At the same time,this algorithm can also be used for the data registration of other protocol in 10GigE environments.

关键词： 10GigE TCP FPGA data registration

作者: Xia Yang Chen YueYang

作者单位: Beijing Institute of Technology, Beijing, 100081, P.R. China

会议类型: 国际会议

会议名称: 2016 2nd International Conference on Mechanical, Electronic and Information Technology Engineering(2016机械、电子和信息技术国际会议)

会议地点: 重庆

会议语种:英文

页码: 175-178

在线出版日期: 2016-03-21（万方平台首次上网日期，不代表论文的发表时间）