Integrated Ⅲ-Ⅴ Optoelectronic Materials on Silicon by Aspect Ratio Trapping

摘要：

　　High quality Ⅲ-Ⅴ materials have been demonstrated in SiO2 trenches on silicon via Metal-organic chemical vapor deposition using Aspect Ratio Trapping method.This approach shows promise for the fabrication of optoelectronic integrated circuits on Si.

作者: Shiyan Li Jiaoqing Pan Xuliang Zhou Xiangting Kong Jing Bian Wei Wang

作者单位: Key Laboratory of Semiconductor Materials Science,Institute of Semiconductors,Chinese Academy of Sciences,No.A35,East Qinghua Road,Beijing 100083,Peoples Republic of China

会议类型: 国际会议

会议名称: 2014 Asia Communications and Photonics Conference(ACP2014)(2014亚洲通信与光子学大会)

会议地点: 上海

会议语种:英文

页码: 1-3

在线出版日期: 2014-11-11（万方平台首次上网日期，不代表论文的发表时间）