Interfacial stress analysis in TSVs by considering the sidewall scallop

摘要：

　　Through-silicon via(TSV)technology has been the core of the next generation of 3D integration.Although some TSV reliability issues have been addressed in some literatures,but the sidewall scallop resulted from Bosch etch process has not been thoroughly investigated.In this paper,we focus on the effects of different sidewall scallops on the interfacial stress evolution.An axi-symmetric single TSV model which contains three interfaces(Cu/Ta,Ta/SiO2,SiO2/Si)is taken into consideration.Besides,different from other FEM models adopted for TSV analysis,the roughness factors λ and h are employed to character the sidewall scallop.Based on the FEM results,the influence of geometric parameters such as the thickness of Ta layer and the morphology of the sidewall scallop are investigated to develop guidelines for TSV design.At last,the equation of which λ and h should be satisfied is proposed,and provides the guidelines for Bosch etch process.

关键词： Through-silicon-via(TSV) Scallop Interfacial stress

作者: WU Wei QIN Fei LI Wei SHI Ge

作者单位: College of Mechanical Engineering and Applied Electronics Technology Beijing University of Technology Beijing,China

会议类型: 国际会议

会议名称: The 15th International Conference on Electronic Packaging Technology (ICEPT 2014) ) (第十五届电子封装技术国际会议)

会议地点: 成都

会议语种:英文

页码: 688-692

在线出版日期: 2014-08-12（万方平台首次上网日期，不代表论文的发表时间）