A New FPGA Prototype for Synchro to Digital Converter Using CORDIC Algorithm
This paper introduce a new approach to FPGA implementation of synchro to digital converter using Coordinate Rotation Digital Computer CORDIC algorithm. This algorithm was the best replacement of analog conversion system by the high resolution digital. CORDIC algorithm used for the fast calculation of elementary functions like multiplication, division, trigonometric functions. The approach is based on receiving the synchro signals S1, S2, and S3 from the synchro motor, and converts them to two perpendicular signals sin signal and cosine signal using solid state Scott-t transformer. Then the a CORDIC circuit receive this signals after converting them to digital and produce the azimuth angle in digital format. This prototype of hardware implementation of CORDIC algorithm used Spartan-Ⅲ series FPGA, with constraint to area efficiency and throughput architecture. The prototype results show that the conversion time is less than 1 1s which is suitable for real time applications in radar and missile control applications.
Mohamed Rizk Ahmed Hossin Alaa El-Din Sayed Hafez
Faculty of Engineering, Alexandria University, Alexandria, Egypt
国际会议
Progress in Electromagnetics Research Symposium 2014(2014年电磁学研究新进展学术研讨会)
广州
英文
50-55
2014-08-01（万方平台首次上网日期，不代表论文的发表时间）