Pipeline Architecture for High Speed License Plate Character Recognition
An embedded hardware for license plate character recognition is designed and implemented on an FPGA (field programmable gate array) with pipeline architecture. The architecture is based on M2DPCA (modular two-dimensional principal component analysis) algorithm. Three processing elements are contained in the proposed pipeline architecture, projection element is designed for matrix multiplication operations of feature extraction, the distances between input character and each class in training database are computed in distance element, and the nearest neighbor classification is carried out in classification element, all functions are run in pipeline. Experimental results show that very high speed is achieved, which provides approximately 28% speedup of equivalent software implementation, and also, the hardware architecture performs extremely resource economical.
license plate recognition character recognition FPGA pipeline processing hardware architecture
Boyu Gu Qiang Zhang Zhenhuan Zhao
Changchun University of Science and Technology.No.7089, Weixing Road, Changchun, 130022, China Continental Automotive Corporation (Lian Yun Gang) Co.Ltd.Changchun Branch.No.1981, Wuhan Road, Chan
国际会议
9th Conference on Image and Graphics Technologies and Applications(IGTA2014)(第九届图像图形技术与应用学术会议)
北京
英文
79-87
2014-06-01（万方平台首次上网日期，不代表论文的发表时间）