Design of a Highly Linear Low-noise Amplifier with Noise and Distortion Cancelation

摘要：

　　This study presents a highly linear low-noise amplifier with noise and distortion canceling.The circuit design of this amplifier focuses on the realization of high linearity and low-noise amplification.An operation within LTE frequency bands(0.7-2.6GHz)produces a noise level of 2.3-3.1dB; IIP3 was+8dBm at a center frequency of 1.7GHz,and P1 dB was-10dBm at 1.7GHz,with an operating voltage of 1.3V.However,enhancement of linearity in an NMOS design may result in additional power consumption.Therefore,this design involved using a PMOS and an NMOS that could cancel second-order harmonic distortion,and the supply of single current could reduce power consumption.The circuit area is 0.86×0.63mm2.

作者: Pang-Hsing Chen Jeng-Rern Yang

作者单位: Microwave Laboratory,Department of Communication Engineering Yuan Ze University,Jhongli City,Taoyuan Country 320,Taiwan,R.O.C.

会议类型: 国际会议

会议名称: Progress in Electromagnetics Research Symposium 2013(2013年电磁学研究新进展学术研讨会)

会议地点: 台北

会议语种:英文

页码: 1115-1120

在线出版日期: 2013-03-01（万方平台首次上网日期，不代表论文的发表时间）