Design and Implementation of A Certain Type of Missile Timing Sequence Testing System

摘要：

　　Timing sequence test is a core part for missile ground testing, the results directly determine whether the missile can be well launched A specialized CPCI timing sequence testing system for missile is presented in this paper, which is able to complete the sequence test of tail boot, gesture controller, sequence circuit, instant flight for both equivalent device and actual missile.Also, the design of structure, firmware, driver and host computer software of the sequence test system are described in details.The experimental results show that the system is stable and efficient, conforming to the design requirements.

关键词： CPCI Timing sequence test FPGA

作者: Liu Zhaoqing Wang Chu Zhang Yigang

作者单位: School of Electrical Engineering and Automation,Harbin Institute of Technology 422＃,Science Park of HIT,No.2A,YiKuang Street,NanGang District,Harbin,150080,P.R.China

会议类型: 国际会议

会议名称: 2013 IEEE 11th International Conference on Electronic Measurement & Instruments(第十一届IEEE国际电子测量与仪器学术会议)

会议地点: 哈尔滨

会议语种:英文

页码: 783-788

在线出版日期: 2013-08-16（万方平台首次上网日期，不代表论文的发表时间）