Design of 10Gb/s VCSEL Driver IC in 0.18μm CMOS

摘要：

　　A design of 10Gb/s VCSEL driver IC in 0.18μm CMOS process is presented.Employing directly coupled three stages of differential amplifiers,active degenerative feedback and C3A structure,the monolithically integrated circuit can amplify the amplitude of input differential signal to 22mA and offer a bandwidth of 9.4GHz at 10Gb/s with a total power consumption of about 91mW.The driver circuit can offer adjustable modulation current from I to 16mA and adjustable bias current from 1 to 10mA.The VCSEL driver can be used in the STM-64 optical fiber communication system.

关键词： VCSEL driver active degenerative feedback C3A directly coupled

作者: Li Wenyuan Zhao Qianru

作者单位: Institute of RF-&OE-ICs,Southeast University,Nanjing,210096,China Institute of RF-&OE-ICs,Southeast University,Nanjing,210096,China;College of Integrated Circuit,Sout

会议类型: 国际会议

会议名称: 2013 2nd international Conference on Opto-Electronics Engineering and Materials Eesearch(2013第二届光电工程与材料研究国际会议)(OEMR2013)

会议地点: 郑州

会议语种:英文

页码: 436-440

在线出版日期: 2013-10-19（万方平台首次上网日期，不代表论文的发表时间）