The Design and Implementation of Reconfigurable Cipher Unit on FPGA

摘要：

　　Encryption is the core of security technology.The paper managed to design and implement a kind of reconfigurable cipher unit based on the 3DES/AES and optimized by FPGA technology,which can effectively support diverse cryptographic algorithms and can meet the demand on system performance and flexibility.The unit uses hardware description language VHDL,layout and wire on QuartusII8.0.Finally the system is downloaded to DE2 for testing.The design hardware structure is simple,flexibility,security,which can be widely used in the field of information security.

关键词： Reconfigurable Encryption/Decryption 3DES/AES FPGA

作者: Weiping Zhang

作者单位: Department of Science and Technology Information Rural Commercial Bank of Zhangzhou,Zhangzhou,China

会议类型: 国际会议

会议名称: 2013 2nd international Conference on Opto-Electronics Engineering and Materials Eesearch(2013第二届光电工程与材料研究国际会议)(OEMR2013)

会议地点: 郑州

会议语种:英文

页码: 1680-1684

在线出版日期: 2013-10-19（万方平台首次上网日期，不代表论文的发表时间）