Improvements of RSA algorithm for hardware encryption implementation based on FPGA
In the field of information security,encryption and decryption operations in RSA cryptographic algorithm are both modular exponentiation.The direct computing method to implement this algorithm through software programming is to multiply M e times with iteration statements and later make modulo operations.The operational speed of this method is feasible when M,e and n are relatively small.However,in order to enhance the security of RSA algorithm,we need to take at least 512-bit values for M,e and n.The operation speed in the way of software implementation is slow,and intermediate results will also take up lots of temporary storage space.Thus,software implementation has great diffieulties.In contrast,hardware encryption has high security,fast speed and strong real-time property.At present,FPGA-based RSA hardware encryption and decryption is a new research direction,and an improved study on the existing low-radix Montgomery algorithm has been made in this article.
Montgomery modular multiplication algorithm Exclusive or arithmetic unit RSA algorithm shift arithmetic unit
Li Youguo
Department of Computer Science Xinyang Agricultural College Xinyang,Henan,China
国际会议
杭州
英文
38-41
2013-03-22（万方平台首次上网日期，不代表论文的发表时间）