Low-Power Near-threshold MOS Current Mode Logic with Power-Gating Techniques

摘要：

　　MOS Current-Mode Logic (MCML) is usually used for high-speed applications.However,the large static power dissipation of MCML circuit limits its application in portable devices.In this work,we proposed a power-gating (PG) technique to reduce the standby power of the near-threshold MCML.The PG 1-bit full adder and a mod-10 counter are designed and simulated using HSPICE at 45nm CMOS technology with predictive technology model (PTM) model.The simulation results show that the standby power of the PG-adder and PG-counter is only 1.0nW and 3.0 nW,respectively.And the performance of the PG MCML circuits does not deteriorate.

关键词： lowe power power-gating current mode logic near-threshold

作者: Yangbo Wu Xiaohui Fan Haiyan Ni Jianping Hu

作者单位: Faculty of Information Science and Technology,Ningbo University Ningbo,China

会议类型: 国际会议

会议名称: 2013 2nd International Conference on Computer Science and Electronics Engineering(ICCSEE2013)(2013年第二届计算机科学与电子工程国际会议)

会议地点: 杭州

会议语种:英文

页码: 1695-1698

在线出版日期: 2013-03-22（万方平台首次上网日期，不代表论文的发表时间）