Reliability LU Appropriate Designs in an HV nLDMOS

摘要：

　　In an nLDMOS,both the drain-side and source-side engineering by adding Nad and Pad layers to obtain a weak snapback characteristic are presented in this work.In this paper,we will detailedly discuss the trigger voltage (Vt1) and holding voltage (Vh) distribution of a novel high-voltage (HV) nLDMOS device.Its a novel method to reduce the Vt1 and to increase the Vh.Therefore,these efforts will be very suitable for the HV applications in power management ICs.

关键词： Snapback Trigger voltage (Vt1) Holding Voltage (Vh) High Voltage (HV) Electrostatic Discharge (ESD) Latch-up (LU) Lateral Diffused MOS (LDMOS)

作者: Shen-Li Chen Tzung-Shian Wu

作者单位: Dept.of Electronic Engineering, National United University, MiaoLi 360, Taiwan

会议类型: 国际会议

会议名称: 3rd International Conference on Frontiers of Manufacturing and Design Science(第三届制造与设计科学前沿国际会议(ICFMD))

会议地点: 香港

会议语种:英文

页码: 1082-1086

在线出版日期: 2012-12-11（万方平台首次上网日期，不代表论文的发表时间）