High-Speed and Anti-Interference Parallel Bus Design on Board

摘要：

　　This paper presents a high-speed and anti-interference parallel bus design on board,which takes a series of measures,including source-synchronous technology,the negative feedback technology,low-voltage differential transmission technology,error correction coding and pseudo-random code technology to improve the environment for parallel communication,increase communication speed,decrease error rate.The final test shows the communication speed has achieved 10 Gbps and the error rate has reduced to 10-7.

关键词： source-synchronous corrected-design parallel communication

作者: Hongqi Yu Sen Liu Nan Li Meng Wang Jinling Xing Zhaolin Sun Xin Xu

作者单位: ESSS Center,School of Electronic Science and Engineering,National University of Defense Technology,Changsha,China

会议类型: 国际会议

会议名称: 2012 International Applied Mechanics,Mechatronics Automation Symposium(2012应用力学,机电一体化自动化国际研讨会)(IAMMAS2012)

会议地点: 沈阳

会议语种:英文

页码: 515-519

在线出版日期: 2012-09-07（万方平台首次上网日期，不代表论文的发表时间）