Automated IP Quality Qualification for Efficient System-on-chip Design

摘要：

　　The robustness and reusability of Intellectual Properties (IPs) is the key to the success of the modern System on chip (SoC) designs.Therefore,it is very important to implement a rigid IP qualification platform to ensure the quality of IPs in the SoC design flow.In this paper,we propose an automated IP qualification platform,which uses XML schema technique to describe the quality model and has a layered architecture referred to the concepts from software metric theory.The experimental results on three open source IPs show that the qualification platform can not only improve accuracy of qualification results,but also accelerate the qualification process.Actually,more than 60% time savings are expected through the proposed automated IP qualification.

作者: Li-wei Wang Hong-wei Luo

作者单位: Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The 5th Electronics Research Institute of the Ministry of Industry and Information Technology Guangzhou 510610,P.R.China

会议类型: 国际会议

会议名称: 2012 International Conference on Electronic Packaging Technology & Hiigh Pachaging(2012电子封装和高密度封装国际会议(ICEPT-HDP2012))

会议地点: 桂林

会议语种:英文

页码: 1222-1225

在线出版日期: 2012-08-13（万方平台首次上网日期，不代表论文的发表时间）