DESIGN OF DIGITAL FILTER IN PARTICLE DETECTOR READOUT CIRCUITS

摘要：

　　The particle detector is used for signal acquisition and processing system of elementary particle information is widely used in nuclear physics,transportation security,Intemet of Things and Signal receiving terminals of the field of mobile communications.Design a structure for particle detector readout circuit trapezoidal filter shaping algorithm.The main algorithm is decomposed into four modules from the required computing resources,storage resources,and whether it will produce overflow or truncation error to consider the choice of structure for each module; to adapt to different noise environment,the design of an adjustable delay unit delay module design; the total of the filter circuit FPGA results show that the digital ladder filter design described in this article correct functionality.

关键词： Ladder filters Particle detectors Readout circuit Signal receiving terminal

作者: Shujuan Yin Xiangyu Li

作者单位: The college of science,Beijing Information Science and Technology University,Beijing 100192,China The Institute of Micro-electronics,Tsinghua University,Beijing 100083,China

会议类型: 国际会议

会议名称: 2012 2nd IEEE International Conference on Cloud Computing and Intelligence Systems (2012年第2届IEEE云计算与智能系统国际会议(IEEE CCIS2012))

会议地点: 杭州

会议语种:英文

页码: 1461-1464

在线出版日期: 2012-10-30（万方平台首次上网日期，不代表论文的发表时间）