The Median Filtering Algorithms Fast Implementation in FPGA

摘要：

　　Based on FPGAS Balance and exchange principle of area and speed,Using the FPGA internal rich logic resources and powerful hardware characteristics,the traditional median filtering algorithm is reduced to 2 clock cycle,Greatly improving the image processing speed.And by using threshold,in a certain extent,reducing the image fuzzy phenomena brought by the median filter.The results of test show that the system runs stability,the time of achieving the median filtering algorithm are narrowed to the shortest clock cycle.

关键词： FPGA Image Processing Median Filtering Threshold

作者: Zhang Daode Pan Yurong Hu Xinyu Yang Guangyou Xu Cheng

作者单位: Hubei Province Key Lab of Modern Manufacture Quality Engineering ;School of Mechanical Engineering, Hubei University of Technology Wuhan, 430068,China

会议类型: 国际会议

会议名称: the 2011 International Conference on Frontiers of Manufacturing Science and Measuring Technology (第一届制造科学与检测技术国际会议(ICFMM2011))

会议地点: 重庆

会议语种:英文

页码: 1054-1057

在线出版日期: 2011-06-23（万方平台首次上网日期，不代表论文的发表时间）