Abnormal capacitance hysteresis phenomena in stacked nanocrystalline-Si based metal insulator semiconductor memory structure
Stack nanocrystalline-Si (nc-Si) based metal insulator semiconductor memory structure was fabricated by plasma enhanced chemical vapor deposition.The doubly stacked layers of nc-Si with the thickness of about 5 nm were fabricated by the layer-by-layer deposition technique with silane and hydrogen mixture gas.Capacitance-Voltage (C-V) measurements were used to investigate electron tunnel and storage characteristic.Abnormal capacitance hysteresis phenomena are obtained.The C-V results show that the flatband voltage increases at first,then decreases and finally increases,exhibiting a clear deep at gate voltage of 9 V.The charge transfer effect model was put forward to explain the electron storage and discharging mechanism of the stacked nc-Si based memory structure.The decreasing of flatband voltage at moderate programming bias is attributed to the transfer of electrons from the lower nc-Si layer to the upper nc-Si layer.
Nanocrystalline-Si Charge Storage Charge Transfer
Xiang Wang Song Chao Yan Qing Guo Jie Song Rui Huang
Department of Physics and Electronic Engineering, Hanshan Normal University,Chaozhou 521041, Peoples Republic of China
国际会议
广州
英文
547-550
2012-11-16（万方平台首次上网日期，不代表论文的发表时间）