Thermal analysis of a face-to-back bonded four-layer stacked 3D IC model

摘要：

　　Three dimensional integrated circuits (3D ICs) consisted of stacking and vertically interconnecting are an emerging technology with great potential for improving system performance.3D integration relies on Through Silicon Via (TSV) interconnection and interlayer bonding between the silicon layers.Due to the advantages of higher device density,lesser signal delay,shorter interconnection length and smaller package size,this technology attracts growing attentions.A number of innovative processes contribute to the realization of 3D IC.These include back grinding,coating,cleaning,etching,wafer thinning,filling of high aspect ratio vias with electroplated copper and interlayer bonding,etc.

关键词： 3D IC Through Silicon Via (TSV) Thermal modeling Finite element

作者: Du Xiuyun Tang Zhenan

作者单位: School of Electronic Science and Technology, Dalian University of Technology, Dalian,Liaoning,China; School of Electronic Science and Technology, Dalian University of Technology, Dalian,Liaoning,China

会议类型: 国际会议

会议名称: 中国微米纳米技术学会第14届学术年会、第3届国际年会暨第6届微米纳米技术“创新与产业化国际研讨与展览会(CSMNT2012 & ICMAN2012)

会议地点: 杭州

会议语种:英文

页码: 1-6

在线出版日期: 2012-11-04（万方平台首次上网日期，不代表论文的发表时间）