会议专题

A Design of Versatile Image Processing Platform Based on the Dual Multi-core DSP and FPGA

As an application of TIs latest multi-core DSP chip TMS320C6678 and Xilinxs FPGA chip XC5VLX110T, This paper designed and implemented a dual-DSP and FPGA real-time image processing system based on the Serial Rapid 1O (SRIO), Hyperlink and reconfigurable technology. It used TMS320C6678 on-chip SRIO and Hyperlink interface module, XC5VLX110T on-chip Rocket IO modules, reconfigurable technology to implement a DSP and FPGA loosely coupled parallel interconnection reconfigurable system. On Embedded operating systems DSP / BIOS architecture, this paper implemented the program of hardware driver of bottom layer and the corresponding data transfer procedures, and also completed the transmission of digital images.

multi-core digital signal processor (DSP) field programmable gate array (FPGA) serial rapid input output (SRIO) Hyperlink Reconfigurable technology

ZhenHuan Zhan Wei Hao Yan Tian DaWei Yao XianHong Wang

Graduate University of Chinese Academy of Science Beijing, China Xian Institute of Optics and Preci Xian Institute of Optics and Precision Mechanics of Chinese Academy of Science Xian, China

国际会议

2012 Fifth International Symposium on Computational Intelligence and Design 第五届计算智能与设计国际会议 ISCID 2012

杭州

英文

814-817

2012-10-28(万方平台首次上网日期,不代表论文的发表时间)