A Model of Reading Process of Timing Diagram of Digital Sequential Logic Circuits Based on Eye-Tracking Evidence
Understanding process of reading timing diagram of digital sequential logic circuits (T-DSLC) can help teachers not only find students’ reading barriers but also propose better teaching strategies.Nine electronic engineering majored students participated in this preliminary experiment in which their reading processes of T-DSLC was recorded an eye tracker.The authors analyzed their reading processes to build model of reading process of T-DSLC.The results showed that there were differences between the model of reading T-DSLC and Gagné’s textual reading model: (1) no stable rules of reading symbols sequentially; (2) no symbol with multiple meanings therefore the reader did not have to select the best explanation of the symbol; (3) no process of recoding; and (4) no process of elaboration.This paper proposed a novel model of process of reading T-DSLC.The proposed model and eye-tracking evidence are considered the results of this pilot study to be used in the future researches when research samples are sufficient.
reading timing diagram digital sequential logic circuit eye-tracking function table
Chi-Wu Huang Hong-Fa Ho Shao-Wei Kuo Zong-Sian Jiang
Department of Industrial Education,Taiwan Normal University Department of Applied Electronics Technology,Taiwan Normal University
国际会议
北京
英文
151-155
2012-08-01（万方平台首次上网日期，不代表论文的发表时间）