A Low Power Speed-configurable SoC supporting Enhanced IEEE 802.15.4 Standard Digital Baseband Chip Design
This paper presented a configurable low power chip supporting enhanced 802.15.4 standard. Compared with previous works, we adopted a flexible architecture ranging from 125kbps to 500kbps under different requirements. A differential non-coherent demodulator is implemented to reduce the power consumption. The chip has been fabricated in SMIC 0.13um CMOS process, and measured results verified the design specification.
Enhanced 802.15.4 configurable low power
Yihao Zhu Yongpan Liu Yinan Sun Cong Wang Bo Zhao Huazhong Yang
Dept. Electronic Engineering Tsinghua University Beijing, China
国际会议
三峡
英文
486-489
2012-05-18(万方平台首次上网日期,不代表论文的发表时间)