Switching Harmonics Reduction Techniques in Digital CMOS Integrated Circuits
This paper deals with the study of spectrum generation from logic circuits, in order to better understand how to suppress the generation of high harmonics, especially in a given frequency band. It is well known that signals with fast edges contain more energy at higher-frequency spectral components. However, existing closed-form expressions become increasingly unwieldy to cover high order harmonics (10th harmonic and above). Furthermore, circuit simulations of such waveforms are difficult, and certain insights are needed to correctly interpret the simulation results. Selection of input signal and transistor model quality impacts the harmonic contents of switching waveforms.
BSIM Spectrum Cadence Spectre Transistor model quality Switching harmonics Process technology
Muhammad Imran Khan
Assistant Professor, University of Engineering and Technology (U.E.T) Taxila, Pakistan. Alumni, Chalmers University of Technology, Goteborg, Sweden
国际会议
三峡
英文
1143-1146
2012-05-18(万方平台首次上网日期,不代表论文的发表时间)