Implementation of Encryption and Decryption Algorithm Based on FPGA
Internet Protocol Security (generally shortened to IPSee ) is a framework of open standard that provides data confidentiality ,data integrity,and data authentication between participating peers at the IP layer. The Data Encryption standard (DES) is used to encrypt and decrypt packet data at IP layer: it turns clear text into. Shared secret keys enable the encryption and decryption,DES uses a 56-bit key,ensuring high-performance encryption,Fieldperformance and low cost for cryptographic application. In this paper ,FPGA is used for carrying out the fully pipeline,fully parallel DES coding and decoding algorithm because it exploits inherent parallelism in the algorithms and matches very well for operations required for private key. Finally,this paper designs core architecture of FPGA for two-round DES algorithm and introduces the flow diagram of DES algorithm in detail. Moreover,some experiments are carried out to study plaintext / ciphertext correlation and statistical characteristic,the results show this method is effective and the proposed cipher has higher security,faster encryption and lower computation expense as well as other good cryptographic properties. Finally,a performance analysis to cryptanalysis is presented by determining the most effective FPGA chip to perform large scale cryptanalysis through a speed survey of various FPGA chips.
IPSec DES FPGA performance evaluation
Yang Changhong Xiong Guo-hong
Scientific Research-industry Department of Yiyang Vocational and Technical College,Yiyang,Hunan,4130 National Household insecticide products quality Supervision and inspection center,Yiyang,Hunan,41300
国际会议
西安
英文
2127-2130
2011-12-23（万方平台首次上网日期，不代表论文的发表时间）