Dual-ADC Based Digital Calibration of Timing Skew for a Time-Interleaved ADC
The performance of time-interleaved analog-to-digital converters (TIADCs) is seriously restricted by the mismatch of the timing skew between ADC channels. The concept of dual-ADC based calibration is that setting two ADC to sample the same input signal synchronously, and the differences of the two outputs are used in calibration algorithm to estimate and compensate the errors in each ADC. Based on this method, we propose a novel 7-channel TIADC with digital background calibration, which focuses on calibrating the timing skew of each ADC channel. The calibration algorithm is based on the least-meansquare iteration. Simulation of the designed 14-bit 7-channel TIADC with MATLAB shows that, with + 0.02 Ts timing skew, and normalized input frequency finfs= 0.05, signal to noise and distortion ratio and spurious free dynamic range of the output signal of the TIADC after calibration reach 85.9dBc and 103dBc, and improve 28dBc and 43dBc, respectively, compared to the uncalibrated output signal.
time-interleaved ADC timing skew digital calibration adaptive calibration
Rui Zhang Yong-sheng Yin Jun Yang Ming-lun Gao
Institute of VLSI Design, Hefei University of Technology, Hefei, China
国际会议
武汉
英文
42-45
2011-10-21（万方平台首次上网日期，不代表论文的发表时间）