Research on Cipher Coprocessor Instruction Level Parallelism Compiler

摘要：

The important method of studying cipher coprocessor is focus on system architecture of processor in combination with reconfigurable design technique. How to improve performance of cipher coprocessor is important. Based on very long instruction word (VLIW) structure and reconfigurable design technique, specific instruction cipher coprocessor is designed. In this paper, the cipher coprocessor instruction level parallelism compilation technique is studied to enhance the cipher coprocessor performance by increasing the instruction level parallelism.

关键词： cipher coprocessor very long instruction word (VLIW) instruction scheduling reconfigurable computing

作者: Hongyan Li

作者单位: Humanities College, Shanghai Second Polytechnic University.Shanghai, China

会议类型: 国际会议

会议名称: 2011 3nd International Conference on Mechanical and Electronics Engineering(2011年第三届机械与电子工程国际会议 ICMEE2011)

会议地点: 合肥

会议语种:英文

页码: 2907-2910

在线出版日期: 2011-09-23（万方平台首次上网日期，不代表论文的发表时间）