Low Power Design of RFID Tags
Low-power design is essential for passive RFID tags to achieve expected level of sensitivity. Considering the mechanism of the passive tags powered, a low peak power is also important. This paper is focused on optimization on peak power. A tag IC is also presented. The IC, which is compatible with the EPC C1G2 RFID protocol, was designed and fabricated successfully by using a 0.18μm process, with a tested sensitivity of -16dBm.
RFID passive tag asynchronous design peak power
X. Yao X. A. Wang J. F. Huang M. Ye
Key Lab of Integrated Micro-systemPeking University, Shenzhen Graduate SchoolShenzhen, China Key Lab of Integrated Micro-system Peking University, Shenzhen Graduate School Shenzhen, China
国际会议
厦门
英文
85-88
2011-06-24(万方平台首次上网日期,不代表论文的发表时间)