A 2GSPS 8-bit ADC with Digital Foreground Calibration Technology

摘要：

A high-speed 8-bit analog-to-digital converter in 0.35μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating architecture and the dualchannel timing interleave multiplexing technology to achieve a sampling rate of 2GSPS. In case of digital calibration, as a result of testing, the ADC achieves 7.32ENOB at analog input of 484MHz, and 7.1ENOB at Nyquist input after the chip is selfcorrected.

关键词： folding and interpolating interleave 2GSPS digital

作者: Zheng-Ping Zhang Yong-Lu Wang Xin-Fa Huang

作者单位: China Electronics Technology Group Corporation No.24 Research Institute, Chongqing 400060,China Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

会议类型: 国际会议

会议名称: 2011 IEEE International Conference on Anti-Counterfeiting Security and Identification(2011防伪、安全及鉴定国际会议 ASID2011)

会议地点: 厦门

会议语种:英文

页码: 143-145

在线出版日期: 2011-06-24（万方平台首次上网日期，不代表论文的发表时间）