A Low-Power 18-GHz Dual-Injection-Locked Frequency Divider in 65-nm CMOS

摘要：

In this paper, an 18-GHz dual-injection locked frequency divider (ILFD) is presented. In order to decrease the complexity of PLL design, the dual-ILFD doesnt adopt a frequency adjustment scheme but achieves a large locking range due to fully utilizing the voltage and current injection of the input signal. This ILFD is implemented in SMIC 65nm CMOS technology and consumes 1.8mW from a 1.2V voltage supply excluding buffers and biasing circuits. The core area is 0.35mm × 0.73mm. The measured locking range is 13JGHz~18.4GHz with 0dBm input power.

关键词： 18GHz dual-ILFD low power large locking range

作者: Dong Huang Shengxi Diao Peng Wei Fujiang Lin

作者单位: Department of Electronic Science and Technology, University of Science and Technology of China Hefei, China

会议类型: 国际会议

会议名称: 2012 5th Global Symposium on Millimeter-Waves(2012年第五届全球毫米波会议 GSMM 2012)

会议地点: 哈尔滨

会议语种:英文

页码: 278-281

在线出版日期: 2012-05-27（万方平台首次上网日期，不代表论文的发表时间）