A High-quality and High-speed System of Bayer Image Restoration Controlled by DM642 and FPGA A Real-time System of Image Processing Controlled by Double Chips

摘要：

Here we present an efficient real-time system for Bayer image restoration. The system uses the dual processing pipeline architectures (DM642 and FPGA) to improve the speed and quality. FPGA collects and pre-processes a raw Bayer image from the CMOS image sensor. DM642 executes core algorithm processing and runs bilinear interpolation algorithm to form the RGB format image. The system could process a Bayer image of 752x480 pixels within 17.4 ms, and could transmit the final image to the host computer with 10Mb/s band-width through the Ethernet port

关键词： DM642 FPGA CMOS image sensor bilinear interpolation

作者: YANG Haoyu WANG Lei CHEN Shenghua YUAN Lingling PAN Xuan GE Manling

作者单位: Key Laboratory of Electromagnetic Field and Electrical Apparatus Reliability, Hebei University of Te School of Electrical Engineering, Langfang Polytechnic Institute, Hebei Provience, China

会议类型: 国际会议

会议名称: 2012 International Conference on Measurement,Information and Control(2012测量、信息与控制国际会议 ICMIC2012)

会议地点: 哈尔滨

会议语种:英文

页码: 935-938

在线出版日期: 2012-05-18（万方平台首次上网日期，不代表论文的发表时间）